About Me
I am currently a deep learning software engineer at NVIDIA. We are working on acclerating the inference of trained deep neural network models. No matter which framework the model was trained on, TensorRT provides a unified platform to deploy the model on NVIDIA GPUs at maximum speed.
I was in the Master of Science program in Electrical and Computer Engineering at University of Illinois at Urbana-Champaign. I received my Bachelor of Science degree in Electrical Engineering here in December, 2015.
My MS thesis is entitled DeepMVS: Learning Multi-View Stereopsis, and our paper is accepted to CVPR 2018. This project was done in collaboration with Prof. Jia-Bin Huang at Virginia Tech and Kevin Matzen and Johannes Kopf at Facebook under the supervision of Prof. Narendra Ahuja.
My current interests include Deep Learning, Computer Vision, Virtual Reality, and GPU Architectures.
Experience
Deep Learning Software Engineer
Date: April 2018 – Present
Abstract:
- Accelerate the inference speed of trained deep neural network models in CUDA
Software Engineering Intern
Date: May 2017 – August 2017
Abstract:
- Estimated 3D model of human faces using data from RGB-D cameras
- Maximized utilization of parallel computing power in multi-GPU computation
Publications
Paper accepted to CVPR 2018! Check out our project webpage for more details.
Date: October 2015 – March 2018
Abstract:
- Trained a deep convolutional neural network which estimates disparity maps from a sequence of unordered images
- Added an encoder-decoder network structure and VGG-19 semantic features to improve the results
- Showed that DeepMVS can overcome the weaknesses of conventional MVS algorithms in near textureless regions
Education
August 2016 – August 2018
August 2013 – December 2015
Cumulative GPA: 3.98/4.00
- Dean’s List: Fall 2013, Spring & Fall 2014, Spring & Fall 2015
- Recipient of Brian & Sophie Leung Merit Scholarship of year 2014 – 2015
- Graduated with the Bronze Tablet Honor (for the top three percent of the students)
August 2012 – June 2013
Cumulative GPA: 4.12/4.30
(3.93/4.00)
- Presidential Award: Fall 2012
- Transferred to University of Illinois at Urbana-Champaign in August 2013
Projects
Project for CS498SL: Virtual Reality
Date: October 2017 – November 2018
Abstract:
- Rendered the geometries of non-Euclidean spaces using OpenGL to an HTC Vive virtual reality headset
- Conducted experiments to understand humans’ capability of navigating in non-Euclidean 3D spaces
Project for ECE408: Applied Parallel Programming
Date: August 2015 – December 2015
Abstract:
- Detected cat faces in images using support vector machine with color histogram and SIFT features
- Accelerated training process with parallel algorithms written in CUDA
Won the Area Award: Courage for setting a challenging goal and achieving it!
Project for ECE445: Senior Design Laboratory
Date: August 2015 – December 2015
Abstract:
- Mapped the 3-D space of a room by throwing a ball around the room and keeping track of the trajectory of the ball
- Located the ball with RF signal intensity and trilateration
- Designed a printed circuit board with EAGLE to transmit RF signals at 2.45GHz
- Calculated and visualized results in Python, C++, and OpenGL
Project for CS439: Wireless Networks
Date: August 2015 – December 2015
Abstract:
- Transmitted data with sound waves in 2kHz–20kHz through solid materials and reached a transmission rate of ~500bps in ideal condition
- Developed a physical layer protocol involving multi-frequency shift keying, Manchester encoding, and packet structure design with preambles, CRC, and SOF/EOF symbols
- Established a MAC layer protocol with adaptive transmission rates and ACK/NACK
- Analyzed and demodulated signals in MATLAB
Project for ECE385: Digital Systems Laboratory
Date: August 2014 – December 2014
Abstract:
- Realized the game "Dance Dance Revolution" with capacity of 63 customizable songs, titles, album covers, and arrow maps on FPGA
- Utilized pipeline structures for image processing in order to display fonts and animations and to handle overlapping regions real-time
- Implemented an SD Card reader in SystemVerilog from scratch with SPI interface and FAT32 filesystem
- Interacted with sound chip and VGA chip through I2C and other interfaces
- Managed memory hierarchy among SD Card, SDRAM, SRAM, and on-chip memory
